using System;

namespace RapidHDL
{
	/// <summary>
	/// Summary description for Register.
	/// </summary>
	public class RegisterComponent : Component
	{
		// clock
		// latch input
		// width
		// data connections

		public NodeVector InputNodes;
		public NodeVector OutputNodes;
		public NodeVector EnableNodes;
		ClockComponent	  oClockComponent;

		int iInputWidth;

		public RegisterComponent(Component poParentComponent, string psName) 
			: base (poParentComponent,psName)
		{
			iInputWidth = piInputWidth;
			this.GetTruthTable("OrGate",iInputWidth,1);
			InputNodes = this.CreateNodeVector("In",iInputWidth,NodeFlowType.Sink);
			OutputNodes = this.CreateNodeVector("Out",iInputWidth,NodeFlowType.Source);
			
		}

		

		public override void CalculateOutput()
		{
		}

		public override bool TransformStructureToVerilog()
		{
		}


	}
}
